Subject: PARC Forum: "Architecture Support for Parallel Programming"; Kunle Olukotun, Stanford University; Thursday, March 23, 2006, 4pm

From: [email-masked]
Date: Fri, 17 Mar 2006 12:59:31 PST

This is the fourth and final PARC forum in the Multicore series.  Dr.
Olukotun will wrap up the topic with the all-important topic of how
software developers can utilize the power of multicore processors with a
relatively smooth transition from sequential to parallel programs.

Title:  Architecture Support for Parallel Programming 
Kunle Olukotun 
Computer Systems Lab 
Stanford University 

Abstract:
The key issue facing chip multiprocessors (CMPs) is the difficulty of
writing parallel programs to run on them. 
In this talk I will explain how support for thread-level speculation
(TLS) in the memory system of a CMP can dramatically improve performance
on sequential applications. I will briefly explain what TLS is and how
it is implemented. I will also describe how TLS can be combined with
managed-runtime languages such as Java to transparently convert
sequential applications into parallel applications. I will also describe
Transactional Coherence and Consistency (TCC). TCC is a way of exposing
the benefits of TLS directly to the programmer using programmer defined
transactions. TCC has the potential to simplify parallel programming by
providing a smooth transition from sequential programs to parallel
programs. I will briefly describe TCC and explain how to develop
parallel applications using the TCC programming model. 

Bio: 
Kunle Olukotun is an Associate Professor of Electrical Engineering and
Computer Science. Olukotun has been a researcher in and proponent of CMP
technology since the early 1990's. Olukotun led the Stanford Hydra
single-chip multiprocessor research project which was the first
microprocessor with multiple processors on a single silicon chip and
support for thread-level speculation. Olukotun founded Afara Websystems
to develop commercial server systems with significant performance/watt
advantages using CMP technology. At Afara, Olukotun was chief scientist
and the co-architect of the 8-core, 32-thread SPARC-based CMP. Afara was
acquired by Sun Microsystems. The Afara microprocessor technology, now
called Niagara (UltraSPARC T1), is at the core of Sun's "Throughput
Computing" initiative. Olukotun is actively involved in research in
computer architecture, parallel programming environments and scalable
parallel system design. Olukotun received his Ph.D. from The University
of Michigan. 

Note:
The Multicore Expo will be held at the Santa Clara Convention Center
between March 21st and March 23rd.  More info at: www.multicore-expo.com

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NEXT WEEK'S FORUM - Thursday, March 30, 2006
PUC's Solar Initiative
Dian Grueneich, California Public Utilities Commissioner 

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